1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More specifically, it relates to a method of manufacturing a compound semiconductor device using viaholes (through-chip holes) in order to improve the high frequency properties of the semiconductor device or to prevent temperature rise.
2. Description of the Related Art
A technique for the formation of xe2x80x9cviaholesxe2x80x9d has become important in monolithic microwave integrated circuits (hereinafter abbreviated as MMICs) and other superhigh frequency semiconductor devices. In this technique, a substrate is grounded from its back side via through-chip holes in order to improve the high frequency properties or to dissipate heat generated during operation.
Such viaholes are generally formed according to the following process as described in, for example, Proc. IEEE GaAs IC Symposium, pp. 267-270 (1992). Specifically, a semiconductor substrate carrying a semiconductor device formed on its principal surface is thinned by backside grinding, backside lapping or polishing, the thinned semiconductor substrate is reversed and is affixed to a base wafer such as a glass substrate with the use of, for example, heat-resistant waxes, and the substrate is subjected to dry etching or wet etching from the back side of the substrate on which no semiconductor device is formed to thereby form viaholes.
However, the aforementioned process cannot significantly use highly selective dry etching masks such as SiO2 films or metal masks that are allowed to adhere to the substrate by treatment at elevated temperatures, since waxes used to affix the thinned substrate in this process are softened during processing of the viaholes at such elevated temperatures.
Accordingly, the process can only use mask materials such as negative type thick layer photoresists. However, with reference to FIG. 1A schematically illustrating a cross section of a formed viahole, these mask materials exhibit low selectivity with respect to a semiconductor material 1 and cannot significantly be controlled in viahole dimension due to regression 3 of a mask 2 to thereby fail to form a fine viahole 13.
In addition, the resist mask 2 is regressed during the dry etching process, and the regression 3 of the resist mask 2 affects a side wall to be processed to thereby invite a rough surface 4 of the side wall. Such a rough side wall may decrease the coverage of a metal during the subsequent metal plating process. A demand has therefore been made on a highly selective mask material that can form a mask at low temperatures and can yield, by etching, a viahole-region having a smooth side wall as shown in FIG. 1B, exhibiting high anisotropy and having a good sectional shape.
Accordingly, an object of the present invention is to solve the problems of the conventional technologies and to provide a method of manufacturing a semiconductor device, which method can form fine viaholes in high yields and can thereby produce a high-performance superhigh-frequency semiconductor device by the use of a mask material that has high dry etching resistance and can form a mask at low temperatures in a process for forming viaholes of a semiconductor.
Specifically, the present invention provides, in a first aspect, a method of manufacturing a semiconductor device. The method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate to thereby form a viahole adjacent to an active region where the active device is formed; and forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate. In this method, a photo sensitive polyimide material is used as an etching mask in the step of forming a viahole.
In the above method, the step of forming a viahole may include the step of etching the semiconductor substrate from the surface of the substrate on which the active device is formed.
Alternatively, the step of forming a viahole may include the step of etching the semiconductor substrate from the back side of the substrate opposite to the surface on which the active device is formed.
In a second aspect, the present invention provides another method of manufacturing a semiconductor device. The method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate with the use of a photo sensitive polyimide material as an etching mask from the surface of the substrate on which the active device is formed to thereby form a viahole adjacent to an active region where the active device is formed; forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate; reversing the substrate and temporarily fixing the reversed substrate on a base wafer with an adhesive; grinding or polishing the back side of the semiconductor substrate temporarily fixed on the base wafer to thereby thin the substrate; subjecting the thinned substrate to wet etching to thereby make the plated wiring at the inside bottom of the viahole open; and separating the semiconductor substrate carrying the viahole from the base wafer.
In the above methods according to the first and second aspects, the semiconductor substrate may be a substrate including a multi-layer epitaxial film of III-V compound semiconductor.
In a third aspect, the present invention provides another method of manufacturing a semiconductor device. This method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate with the use of a photo sensitive polyimide material as an etching mask from the surface of the substrate on which the active device is formed to thereby form a viahole adjacent to an active region where the active device is formed; forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate; reversing the substrate and temporarily fixing the reversed substrate on a base wafer with an adhesive; grinding or polishing the back side of the semiconductor substrate temporarily fixed on the base wafer to thereby thin the substrate; etching the thinned substrate with the use of a photo sensitive polyimide material as an etching mask in a region to be a viahole and a region directly underneath the active device on the surface of the substrate from the back side of the substrate to make the plated wiring at the inside bottom of the viahole open to thereby form a viahole structure and a heat-sink structure in one process step; plating a metal on overall of the back side of the substrate to thereby form a plated metal layer; and separating the semiconductor substrate carrying the viahole from the base wafer.
The present invention also relates to a method of forming a viahole. The method includes the steps of forming a pilot hole having a depth of about several micrometers to ten micrometers with an accuracy of from 0.01 micrometer to several micrometers in a region to be a viahole from its surface using a very highly selective silicon oxide film or metal mask; reversing the substrate and thinning the reversed substrate from its back side to a finishing thickness of the substrate; etching the thinned substrate from the back side thereof according to the method of the first aspect of the present invention to thereby form a deep hole having a diameter of opening space larger than that of the pilot hole; and thus connecting the deep hole and the pilot hole with each other to thereby form a viahole.
The present invention also relates to a technique in which viaholes are formed according to the method of the first or second aspect of the invention, the formed viaholes are covered with or filled with a metal by vapor deposition, metal plating or another technique and are then molded or sealed with the photo sensitive polyimide material in all or necessary portions thereof.
The present invention also relates to a field effect transistor manufactured by the method of manufacturing a semiconductor device of the present invention and to a semiconductor high-frequency circuit using the field effect transistor. In these devices, source electrodes are formed in a position adjacent to a multi-fingered electrode, and viaholes 1 to 20 xcexcm wide are formed directly underneath and adjacent to the source electrodes in order to ground from the back side of a semiconductor substrate. In this configuration, each of the viaholes corresponds to each finger of the multi-fingered electrode.
In addition and advantageously, the present invention relates to a bipolar transistor, a hetero-junction bipolar transistor and semiconductor high-frequency circuits using these transistors. In these devices, viaholes 1 to 20 xcexcm wide are formed outside the isolation boundary of the transistor. Each of the viaholes corresponds to each of emitter electrodes.
A feature of the present invention to achieve the above objects is the use of a photo sensitive polyimide material as an etching mask in the formation of viaholes by dry etching. When the photo sensitive polyimide material is cured, it exhibits stable properties near to those of glass, has satisfactory resistance to dry etching and can yield a film having a controlled and uniform thickness by spin coating as in conventional photoresists.
It is also advantageous that the photo sensitive polyimide material can form a thick layer about 10 to 40 xcexcm thick in one process step in contrast to SiO2, while the resulting thickness depends on the viscosity of the photo sensitive polyimide material. In addition, the etching mask using the material can form patterns using an exposure system as in the conventional photoresists and can thereby simplify the process.
For example, when viaholes are formed on a GaAs substrate from the surface thereof, a possible candidate as a mask is, for example, a SiO2 mask that is formed by conventional atmospheric pressure chemical vapor deposition (CVD) or plasma CVD and has satisfactory etching resistance. However, while depending on its selectivity, such a mask for use herein must have a thickness of at least 5 xcexcm in order to form a hole about 80 xcexcm deep, and such a thick mask cannot commercially be manufactured in volume by conventional CVD processes.
When viaholes are formed after the formation of high electron mobility transistors (HEMTs), hetero-junction bipolar transistors (HBTs), metal semiconductor field emission transistors (MESFETs) and other devices and circuits thereof on a principal surface of a compound semiconductor substrate, these devices and circuits undergo high temperatures of equal to or more than 300xc2x0 C. or plasma induced damage during the formation of the viaholes. This technique therefore lacks practicability.
According to the conventional CVD processes, an etching mask is obtained after the formation of a resist mask and subsequent dry etching. In contrast, the use of the photo sensitive polyimide material according to the present invention as an etching mask can yield an etching mask by a single photo-etching process, and the resulting etching mask obtained in one process step can have a film thickness of about 10 to 40 xcexcm and exhibits a significantly high throughput.
The resulting photo sensitive polyimide mask can be cured at relatively low temperatures of from about 200xc2x0 C. to about 250xc2x0 C. after exposure and development. The cured polyimide material exhibits a high selectivity of equal to or more than 20 to dry etching and can thereby yield viaholes with significantly good shapes as compared with the use of conventional thick layer photoresists each having a selectivity of from about 3 to about 5.
In the method of forming a viahole using a conventional resist mask, the target viahole has a design diameter of opening space of 40 xcexcmxcfx86 but exhibits an enlarged finish diameter of opening space of about 80 xcexcmxcfx86 due to the regression of the mask during the formation of the viahole 80 xcexcm deep. However, by using the highly selective polyimide mask according to the present invention, a viahole having a diameter of opening space close to the design diameter thereof can be obtained without significant enlargement of the diameter of opening space.
This means that the combination of the technique according to the present invention with the technique for the formation of a viahole from the surface of the semiconductor substrate can yield a fine viahole having a diameter of about 0.5 to 1.0 xcexcmxcfx86 which cannot be formed by the conventional methods.
After the formation of a viahole according to the above method, at least the inner wall of the formed viahole is covered with a metal by, for example, plating. The side wall in the formed viahole is very smooth to thereby ensure easy coverage and a sufficient thickness of the metal in the subsequent metal plating process and to improve reliability of the resulting viahole. This is because the photo sensitive polyimide material according to the present invention can yield a viahole exhibiting a high selectivity with minimized roughness of the side wall, which roughness occurs when the conventional mask materials having a low selectivity are used.
The viahole is then subjected to the metal plating process and a subsequent patterning process by etching for the formation of wiring. The reliability of the resulting viahole can further be improved by filling and molding (sealing) necessary portions of the patterned viahole with the photo sensitive polyimide material according to the present invention. In this procedure, the photo sensitive polyimide material does not significantly affect the high frequency properties of the product device, since it has a sufficiently low dielectric constant of about 2 to 3 at a frequency of 1 kHz.
Next, the GaAs substrate carrying the semiconductor devices on its principal surface is reversed and is then affixed to a base wafer such as glass wafer with the use of a wax, the back side of the substrate on which no semiconductor device is formed is thinned by etching or grinding to thereby make the bottom surface of the viahole open, which viahole carries the metal layer and is formed in the substrate. This procedure cannot use the masks that are formed by treatment at high temperatures, such as a SiO2 mask, but can only use thick layer photoresists having a low selectivity, since the wax used is softened at such high temperature treatment. However, by using the photo sensitive polyimide material through post-exposure baking at 110xc2x0 C. for several minutes without curing, the viahole can highly selectively be processed as compared with the use of the conventional thick layer photoresists.
While the cured photo sensitive polyimide material exhibits a selectivity of about 20, the photo sensitive polyimide material which has been post-exposure baked without curing exhibits a somewhat low selectivity of about 10 but can yield a viahole having a good shape as compared with the use of the conventional photoresists each having a selectivity of from 3 to 5.
In addition, the viahole formed by the use of the photoresists has a thick polymer layer on its side wall and invites some troubles. However, the use of the photo sensitive polyimide material does not invite such troubles and can form a viahole having a smooth surface with a profile having a high aspect ratio.